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Freescale Semiconductor /MKE14Z7 /SCG /ROSCCSR

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Interpret as ROSCCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ROSCCM 0 (0)ROSCCMRE 0 (0)LK 0 (0)ROSCVLD 0 (0)ROSCERR

ROSCCMRE=0, ROSCERR=0, ROSCCM=0, ROSCVLD=0, LK=0

Description

RTC OSC Control Status Register

Fields

ROSCCM

RTC OSC Clock Monitor

0 (0): RTC OSC Clock Monitor is disabled

1 (1): RTC OSC Clock Monitor is enabled
ROSCCMRE

RTC OSC Clock Monitor Reset Enable

0 (0): Clock Monitor generates interrupt when error detected

1 (1): Clock Monitor generates reset when error detected
LK

Lock Register

0 (0): Control Status Register can be written.

1 (1): Control Status Register cannot be written.
ROSCVLD

RTC OSC Valid

0 (0): RTC OSC is not enabled or clock is not valid

1 (1): RTC OSC is enabled and output clock is valid
ROSCERR

RTC OSC Clock Error

0 (0): RTC OSC Clock Monitor is disabled or has not detected an error

1 (1): RTC OSC Clock Monitor is enabled and detected an RTC loss of clock error

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data